Peter Jaenecke > Patente/Technisches

ARIX_mv: Inference Engine for Many-Valued Logics

ARIX_mv is an inference engine with applications in all types of knowledge-based systems such as expert systems, semantic search engines, systems for intelligent control or decision making. ARIX_mv uses facts from databases related systems like ontologies and can provide an explanation of its conclusions. Its approach is arithmetical and it draws inferences from knowledge represented in a many-valued first order logics. The arithmetical approach minimises the computation requirements and makes the inference mechanism universal, i.e. not restricted to specialized inference rules.


A digital 1-bit wide abstractor for generating an exemplary pattern from a digital input information E, the abstractor having an evaluation unit which performs a transfer function p and to whose input the digital input information E is fed. The abstractor further includes a first decision unit having a first input which is connected with an output of the evaluation unit, a second input to which the input information E is fed, and third and fourth inputs to which a first predeterminable set value and a second predeterminable set value, respectively, are fed, with the first decision unit implementing an activation state according to an activation function, the first decision unit providing at an output thereof an output information according to an output function.

Data Processing System and Method Based on Neural Networks

Universally usable data processing devices and method for data processing using neural networks. Suitable logic combination of a plurality of neural networks.

Adaptive Digital Predistortion System

An adaptive digital predistortion system and a method for correcting especially power amplifier memory effects. In particular, the invention relates to an electronic circuit, for amplifying an input signal, comprising: a clipping unit for generating a signal, having a reduced peak-to-average power ratio by clipping the input signal; a predistorter for generating a predistorted signal, defined by an predistortion algorithm which is based on the amplifier model function; a representation unit for representing the amplifier model function; a non-linear processing unit, in particular a power amplifier, for generating a processed signal, in particular by amplifying said received predistorted signal; a time delay unit for compensating the processing time for the predistorted signal generating the delayed predistorted signal; and a time delay cascade for delaying the said delayed predistorted signal, at the integer sample clocks generating the signals.

OFDM Coding Using Hermite Polynomials

Hermite polynomials are used as basic functions for an Orthogonal Frequency Division Multiplexing (OFDM).

An Analysis of Code-Division Multiple Access for LMDS

The application of code-division multiple access (CDMA) to local multipoint distribution services (LMDS) networks is investigated with respect to interference minimization and to an optimum utilization of the bandwidth. Two basic approaches are presented for the downlink and the uplink. The first approach is derived from the frequency assignment scheme commonly used for time-division multiple access (TDMA). The second approach is based on the assignment of only one frequency per cell. In combination with cell sectoring done by narrow-beam subscriber antennas and a dynamic code allocation to the sectors, this method leads to a significant increase of the overall cell capacity and allows a more flexible cell arrangement. In addition, an extension of the second approach with multimode CDMA is introduced for the downlink which increases its worst case SIR. Finally, some implementation requirements are discussed.

Vortrag 7th European Conference on Fixed Radio Systems and Networks, Dresden 2000

Ecrr_2000_Dresden.pdf Ecrr_2000_Dresden.pdf (153,2 kB)